1. Field of the Invention
The present invention relates generally to an epitaxial process, and more specifically to an epitaxial process, wherein a homogenized buffer layer with a flat bottom shape was formed below an epitaxial layer.
2. Description of the Prior Art
For decades, chip manufacturers have made metal-oxide-semiconductor (MOS) transistors faster by making them smaller. As the semiconductor processes advance to very deep sub micron era such as 65-nm node or beyond, how to increase the driving current for MOS transistors has become a critical issue. In order to improve the devices performances, crystal strain technology has been developed. Crystal strain technology is becoming more and more attractive as a means for getting better performances in the field of MOS transistor fabrication. Putting a strain on a semiconductor crystal alters the speed at which charges move through that crystal. Strain makes CMOS transistors work better by enabling electrical charges, such as electrons, to pass more easily through the silicon lattice of the gate channel. In the known arts, attempts have been made to use a strained silicon layer, which was grown epitaxially on a silicon substrate with a silicon germanium (SiGe) structure or a silicon carbide structure disposed therebetween. In this type of MOS transistor, a biaxial tensile strain occurs in the epitaxy silicon layer due to the silicon germanium structure or the silicon carbide structure which has a larger or smaller lattice constant than silicon, thereby altering the band structure, and the carrier mobility increases. This enhances the speed performances of the MOS transistors.
Moreover, the performance of an epitaxial layer is related to its size, ingredients, the distribution of the ingredients and its position, even the relative position to a gate. Improving the performance of an epitaxial layer to enhance the performances or achieve specific electrical requirements for formed semiconductor structure has therefore become an important issue in the industry.